PCB manufacturing and PCB assembly factories
| 一. Wiring |
| In PCB design, wiring is an important step to complete product design. It can be said that the previous preparations are all done for it. In the entire PCB, the wiring design process has the highest limit, the most detailed skills, and the largest workload. |
| PCB wiring includes single-sided wiring, double-sided wiring and multi-layer wiring. There are also two ways of wiring: automatic wiring and interactive wiring. Before automatic wiring, interactive wiring can be used to pre-wire more stringent lines. The edges of the input and output terminals should avoid adjacent parallels to avoid reflection interference. If necessary, ground isolation should be added, and the wiring of two adjacent layers should be perpendicular to each other, and parasitic coupling is easy to occur in parallel. |
| The routing rate of automatic routing depends on a good layout, and the routing rules can be preset, including the number of bending times, the number of via holes, and the number of steps. Generally, exploratory warp routing is performed first, and the short lines are quickly connected, and then maze routing is performed, and the wiring to be placed is firstly optimized for the global wiring path. It can disconnect the already laid lines as needed. And try to re-route to improve the overall effect. |
| For the current high-density PCB design, I feel that the through hole is not suitable for it. It wastes a lot of precious wiring channels. , It also saves many wiring channels to make the wiring process more convenient. More fluent and more perfect, the design process of PCB board is a complex and simple process, in order to master it well, it is necessary for the vast number of electronic engineering designers to experience it by themselves in order to get the true meaning of it. |
| 1. Handling of power supply and ground wire |
| Even if the wiring in the entire PCB board is completed well, the interference caused by the inconsiderate consideration of the power supply and ground wire will degrade the performance of the product, and sometimes even affect the success rate of the product. Therefore, the wiring of electricity and ground wires should be taken seriously, and the noise interference generated by electricity and ground wires should be minimized to ensure the quality of products. |
| Every engineer who is engaged in the design of electronic products understands the cause of the noise between the ground wire and the power wire, and now only expresses the reduced noise suppression: |
| It is well known to add a decoupling capacitor between the power supply and the ground. |
| Try to widen the width of the power supply and ground wire, preferably the ground wire is wider than the power wire. Their relationship is: ground wire > power wire > signal wire, usually the signal wire width is: 0.2~0.3mm, the thinnest width can reach 0.05~0.07mm, and the power wire is 1.2~2.5 mm |
| For the PCB of the digital circuit, a wide ground wire can be used to form a loop, that is, to form a ground network (the ground of the analo circuit cannot be used in this way) |
| Use a large area of copper layer as the ground wire, and connect the unused places to the ground on the printed board as the ground wire. Or make a multi-layer board, the power supply and the ground wire each occupy one layer. |
| 2. Co-location of digital circuits and analo circuits |
| Nowadays, many PCBs are no longer single-function circuits (digital or analo circuits), but are composed of a mixture of digital circuits and analo circuits. Therefore, it is necessary to consider the mutual interference between them when wiring, especially the noise interference on the ground. |
| The frequency of the digital circuit is high, and the sensitivity of the analo circuit is strong. For the signal line, the high-frequency signal line should be as far away from the sensitive analo circuit device as possible. For the ground line, the whole PCB has only one node to the outside world, so The problem of digital and analo common ground must be dealt with inside the PCB, and the digital ground and analo ground inside the board are actually separated, and they are not connected to each other, but only at the interface between the PCB and the outside world (such as plugs, etc.). |
| The digital ground and the analo ground are shorted a bit, please note that there is only one connection point. There are also non-common grounds on the PCB, which is determined by the system design. |
| 3. The signal line is laid on the electrical (ground) layer |
| When wiring multi-layer printed boards, since there are not many lines left in the signal line layer, adding more layers will cause waste and increase the workload of production, and the cost will increase accordingly. To solve this contradiction, you can consider wiring on the electrical (ground) layer. |
| The power layer should be considered first, and the ground layer second. Because it is best to preserve the integrity of the formation. |
| 4. Treatment of connecting legs in large-area conductors |
| In large-area grounding (electricity), the legs of commonly used components are connected to it, and the treatment of the connecting legs needs to be considered comprehensively. In terms of electrical performance, it is better for the pads of the component legs to be fully connected to the copper surface, but for There are some bad hidden dangers in the welding assembly of components, such as: |
| ·Welding requires a high-power heater. |
| ·It is easy to cause virtual solder joints. Therefore, taking into account the electrical performance and process requirements, it is made into a cross flower pad, which is called a heat shield, commonly known as a thermal pad (Thermal), |
| In this way, the possibility of false solder joints due to excessive heat dissipation of the cross-section can be greatly reduced during welding. The treatment of the electric (ground) layer legs of the multilayer board is the same. |
| 5. The role of the network system in wiring |
| In many CAD systems, wiring is determined according to the network system. If the grid is too dense, although the number of channels increases, the step size is too small, and the data volume of the map field is too large. This will inevitably have higher requirements for the storage space of the device, and at the same time, it will also affect the computing speed of computer electronic products. huge impact. |
| And some paths are invalid, such as those occupied by the pads of component legs or by mounting holes and fixed holes. Too sparse a grid and too few channels have a great impact on the routing rate. Therefore, there must be a grid system with reasonable density to support the wiring. |
| The distance between the legs of standard components is 0.1 inches (2.54mm), so the basis of the grid system is generally set at 0.1 inches (2.54 mm) or an integer multiple of less than 0.1 inches, such as: 0.05 inches, 0.025 inches, 0.02 inches wait. |
| 6. Design rule checking (DRC) |
| After the wiring design is completed, it is necessary to carefully check whether the wiring design conforms to the rules formulated by the designer, and also confirm whether the established rules meet the requirements of the printed board production process. The general inspection includes the following aspects: |
| Whether the distance between lines and lines, lines and component pads, lines and through-holes, component pads and through-holes, and through-holes and through-holes is reasonable and meets production requirements. |
| Is the width of the power and ground wires appropriate, and is the coupling between the power and ground wires tight (low wave impedance)? Is there any place in the PCB where the ground wire can be widened. |
| Whether the best measures have been taken for the key signal lines, such as the shortest length, plus protection lines, and the input lines and output lines are clearly separated. ·analo circuit and digital circuit part. Whether there are separate ground wires. |
| Whether the graphics (such as icons and labels) added to the PCB will cause a short circuit of the signal. ·Modify some unsatisfactory line shapes. |
| Is there a process line on the PCB? Does the solder mask meet the requirements of the production process, is the size of the solder mask appropriate, and is the character mark pressed on the device pad, so as not to affect the quality of the electrical equipment. |
| Whether the outer frame edge of the power ground plane in the multilayer board is reduced, such as the copper foil of the power ground plane is exposed outside the board, which is easy to cause a short circuit. |
| 7. Check whether there are sharp angles, impedance discontinuities, etc. |
| 1) For high-frequency current, when the bend of the wire presents a right angle or even an acute angle, the magnetic flux density and electric field strength are relatively high near the bend, and strong electromagnetic waves will be radiated, and the inductance here It will be relatively large, and the inductive reactance will be larger than obtuse or rounded corners. |
| 2) For the bus wiring of digital circuits, the wiring corners are obtuse or rounded, and the area occupied by the wiring is relatively small. Under the same line spacing conditions, the width of the total line spacing is 0.3 times less than that of a right-angle turn. |
| 8. Check the 3w and 3h principles |
| 1) Clock, reset, signals above 100M, and some key bus signals and other signal lines must meet the 3W principle. There are no long parallel lines on the same layer and adjacent layers, and there are as few vias as possible on the link. |
| 2) The number of vias for high-speed signals. Some device guides generally have strict requirements on the number of vias for high-speed signals. The principle of consulting interconnection is that in addition to the necessary pin fanout vias, it is strictly forbidden to make redundant inner layers. They laid out the 8G PCIE3.0 traces, and also drilled 4 vias, no problem. |
| 3) The center distance of clocks and high-speed signals on the same layer must strictly meet 3H (H is the distance from the wiring layer to the return plane); signals on adjacent layers are strictly prohibited from overlapping, and it is recommended to meet the principle of 3H. Regarding the above-mentioned crosstalk problem, there are tools that can check. |
| 二. Wiring constraints |
| Wiring Constraints: Layer Distribution Routing Constraints: Layer Distribution Laminated Structure of RF Single Boards |
| 1. Wiring constraints: basic requirements |
| 1) The routing requirements should be as short as possible, no closed loops, no sharp and right angles, the width of the lines should be consistent, and there should be no floating lines. |
| 2) Differential signal lines—generally run high-speed signals, which must meet the symmetry of impedance. Differential lines cannot be crossed, and the difference in line length cannot exceed 100mil. Between differential lines and between a single differential line and the ground. Meet impedance requirements. The number of differential wiring vias cannot exceed 4, and the spacing between differential line pairs meets the 3W rule. |
| 3) It is forbidden to run clock lines, control lines, and electromagnetic sensitive lines under general crystal oscillators, pll filter devices, analo processing signal processing chips, inductors, and transformers. |
| 4) analo signal and digital signal, power line and control signal line. Weak signals and any other signals cannot be routed side by side, and should be layered (preferably with ground isolation) or routed far away. If the lines of the adjacent layers of the layer need to be crossed, they cannot be routed in parallel. In order to reduce crosstalk between lines, the line spacing should be large enough. When the line center spacing is not less than 3 times the line width, 70% of the electric field can be kept without interfering with each other, which is called the 3W rule. If you want to achieve 98% of the electric field does not interfere with each other, you can use a 10W spacing. (Note: When wiring the clock, you must pay attention to the effective isolation from the data line and the control signal line. The farther the distance, the better, try not to arrange it on the same layer.) |
| 5) Strong radiation signal lines (high frequency, high speed, especially clock lines) should not be close to interfaces, handles, etc. to prevent external radiation. |
| 6) Sensitive signals (mainly refer to: weak signal, reset signal, comparator input signal, AD reference power supply, phase-locked loop filtrate signal, filter part of PLL circuit inside the chip.) The wiring should be as short as possible, not close to strong Radiation signal, not placed on the edge of the board, more than 15mm away from the outer metal frame. For long-distance wiring, you can cover the ground (it should be noted that the ground cover may cause impedance changes), and inner layer wiring. In addition, for the wiring of chips with weak ESD, inner layer wiring is recommended, which can reduce the probability of chip damage. |
| 2. Wiring constraints: power supply |
| 1) Pay attention to power decoupling and filtering to prevent interference between different units through the power lines, and the power lines should be isolated from each other when wiring the power supply. The power line is isolated from other strong interference lines (such as CLK) with ground wires. |
| 2) The power wiring of the small-signal amplifier needs to be isolated by ground copper and ground vias to prevent other EMI interference from entering and deteriorating the signal quality of this stage. |
| 3) Different power layers should avoid overlapping in space. Mainly to reduce the interference between different power sources. Especially between some power supplies with very different voltages, the overlapping problem of the power supply plane must be avoided. If it is difficult to avoid, the intermediate ground layer can be considered. |
| 3. Wiring constraints: power supply overcurrent capability |
| 1) The number of via holes for the printed wires of the power supply part to be transferred between layers meets the requirements of the passing current (1A/Q0.3mm hole) |
| 2) The copper foil size of the POWER part of the PCB conforms to the maximum current flowing through it, and the margin is considered (the general reference is 1A/mm line width) |
| 4. Wiring constraints: grounding method |
| 1) The ground wire should be short and straight to reduce the distributed inductance and the interference caused by the common ground impedance. |
| Adjust the direction of filter capacitors in each group to reduce the ground loop. Three filter capacitors shown in Figure 15. The ground is biased in the direction of the relevant RF components, especially the high-frequency filter capacitors. |
| 2) When the grounding device and the power filter capacitor on the RF main signal path need to be grounded, in order to reduce the grounding inductance of the device, it is required to be grounded nearby. |
| 3) The bottom of some components is a grounded metal shell, and some grounding holes should be added in the projection area of the component, and the surface layer in the projection area must not have signal lines and vias; |
| 4) When the ground wire needs to travel a certain distance, the line width should be thickened and the length of the line should be shortened. It is forbidden to approach and exceed 1/4 of the guide wavelength to prevent signal radiation caused by antenna effects; |
| 5) Except for special purposes, there must be no isolated copper skin, and ground wire holes must be added on the copper skin |
| 6) For some sensitive circuits and circuits with strong radiation sources, put them in the shielding cavity respectively, and the shielding cavity is pressed against the surface of the PCB during assembly. When designing the PCB, it is necessary to add a "via shielding wall", which is to add a grounding via hole on the part of the PCB that is close to the wall of the shielding cavity. As shown in Figure 12 below, there must be more than two rows of vias, and the two rows of vias are staggered from each other. The spacing of via holes in the same row is about 100mils. |
| 5. Routing Constraints: General Rules |
| 1) The RF signal is carried on the top layer of the PCB, and the plane layer below the RF signal must be a complete ground plane to form a microstrip line structure. As shown in Figure 13. To ensure the structural integrity of the microstrip line, it must be done: the microstrip line in the same layer should be covered with copper skin. It is recommended that the edge of the ground copper skin be 3H wide from the edge of the microstrip line. H represents the thickness of the dielectric layer. Within the range of 3H, there shall be no other signal vias. Do not allow RF signal traces to cross the ground plane gap on the second layer. Ground copper should be added between uncoupled microstrip lines, and ground vias should be added on the ground copper. |
| The distance from the microstrip line to the shielding wall should be kept above 3H. The microstrip line must not cross the dividing line of the second-layer ground plane. |
| 2) The distance between the ground copper skin and the signal trace is required to be ≥3H. |
| 3) Ground wire holes are added to the edge of the ground copper skin, the hole spacing is about 100mils, and the holes are arranged evenly and neatly; |
| 4) The edge of the copper skin of the ground wire should be smooth and flat, and sharp burrs are prohibited; |
| 5) If there are other RF signal lines around the RF signal wiring. It is necessary to supplement the ground copper skin between the two, and add a ground via hole on the ground copper skin at an interval of about 100mils to play an isolation role. |
| 6) If there are other irrelevant non-RF signals (such as passing power lines) around the RF signal wiring, a ground copper sheet should be added between the two, and a ground via should be added every 100mils or so. |
| 7) The RF signal via hole is close to other wiring on the inner layer. As shown in the left figure, the passing power line is close to the RF signal via hole. The EMI interference on the power line will enter the RF wiring, so the right figure in Figure 14 should be used correctly The wiring method is based on the auxiliary ground between the power line and the RF signal via hole and the ground via hole, which plays an isolation role. Sometimes the RF signal line on the inner layer is close to the vias of other signals with strong interference (such as passing power lines), and the same method is used to supplement the ground and add ground vias. |
| 8) When the device mounting hole is a non-metallized hole, the RF signal wiring should be far away from the device mounting hole. It is necessary to add ground copper between the RF signal wiring and the mounting hole, and add a ground via. |
