Multi-layer PCB circuit board companies often encounter the problem of "the hole is too close to the line, which exceeds the process capability". When we design the PCB board, what we consider most is how to make the wiring of each layer the same as the network signal line in the most reasonable way. on the connection. The denser the high-speed PCB board lines, the greater the density of via holes (VIA)), and the via holes can play the role of electrical connection between layers.
So, what kind of difficulties will the near hole cause to production? What near hole problems do we need to pay attention to? The following editor will tell you one by one.
1. If the two holes are too close during the drilling operation, it will affect the timeliness of the PCB drilling process. After the first hole is drilled, the material on one side will be too thin when the second hole is drilled, resulting in uneven force on the drill tip and uneven heat dissipation of the drill tip, resulting in broken drill tip, resulting in collapse of the PCB hole. Beautiful or missing drill holes are not conductive.
2. In the PC multi-layer board, there will be an annular ring on each layer of the circuit, and the surrounding environment of each layer of the annular ring is different, with or without clamping lines. When the CAM engineer of the PCB board factory optimizes the file, he will cut off a part of the annular ring when the clamp line is too close or the hole is too close to the hole, so as to ensure that there is a safe distance of 3mil between the soldering ring and the copper/wire of different networks. .
3. The hole position tolerance of the drilled hole is ≤0.05mm. When the tolerance reaches the upper limit, the following situations will occur in the multilayer board:
(1) When the lines are dense, there will be small gaps irregularly at 360° from the vias to other elements. To ensure a safe spacing of 3mil, the pads may be cut in multiple directions.
(2) Calculated according to the source file data, the edge of the hole is 6mil from the edge of the line, the ring is 4mil, and the ring is only 2mil from the line. To ensure a safe distance of 3mil between the ring and the line, it is necessary to cut the 1mil welding ring, and the pad after cutting is only 3mil . When the hole position tolerance offset is the upper limit of 0.05mm (2mil), there is only 1mil left in the annular ring.
4. There will be small star shifts in the same direction in PCB production, and the direction in which the pads are cut is irregular, and the worst phenomenon will cause some holes to break the welding ring.
5. The influence of the lamination deviation of the inner layer of the PCB multilayer board. Taking the six-layer board as an example, two core boards + copper foil are laminated to form a six-layer board. During the pressing process, there may be a deviation of ≤0.05mm when the core plate 1 and the core plate 2 are pressed, and the inner layer hole will also have a 360° irregular deviation after pressing.
From the above problems, it can be concluded that the PCB board yield rate and PCB board production efficiency are affected by the drilling process. If the annular ring is too small and there is no complete copper protection around the hole, although the PCB can pass the open-short circuit test and there will be no problems in the use of previous products, the long-term reliability is not enough.
Therefore, suggestions for multi-layer PCB boards, high-speed PCB board hole-to-hole, and hole-to-line spacing are given：
(1) Holes to wires to copper in the inner layer of the multilayer board: 4 layers: don't care
6 layers: ≥6mil
8 layers: ≥7mil
10 or more layers: z8mil
(2) The distance between the inner diameter and the edge of the via hole: the via hole of the same network: ≥8mil (O.2mm) the via hole of the different network: ≥12mil (O.3mm)
